Thanks for the explanations. I kept coming across this talk of "BANK" without it ever being defined. I had to start ploughing through the rp2040 reference manual before I found something.
It seems the setting I was missing was :
There are a few holes in the sdk documentation like not defining the permissible values of some enums. I had to go to source to find GPIO_FUNC_SIO and another one.
There seem to be some errors too: in gpio_init() and gpio_init_mask() it says:
Anyway , after two days of digging I am now capturing my input events and I can get back to the real job.![Smile :)]()
I intended to move all these IRQs to core1. The ISR is short enough that I can probably leave them all on one core. It's six 100hz signals, it won't swamp the core.
Thanks for your help.
It seems the setting I was missing was :
Code:
irq_set_enabled(IO_IRQ_BANK0, true);
There are a few holes in the sdk documentation like not defining the permissible values of some enums. I had to go to source to find GPIO_FUNC_SIO and another one.
There seem to be some errors too: in gpio_init() and gpio_init_mask() it says:
From the reference manual there are separate bits to enable input and output, it is not one bit which toggles.Clear the output enable (i.e. set to input).
Anyway , after two days of digging I am now capturing my input events and I can get back to the real job.

I intended to move all these IRQs to core1. The ISR is short enough that I can probably leave them all on one core. It's six 100hz signals, it won't swamp the core.
Thanks for your help.
Statistics: Posted by pie_face — Tue Aug 06, 2024 2:33 pm