My question is why WL_GPIO1 and WL_GPIO2 are connected to the places that they are connected to, especially WL_GPIO1?
The VBUS sense input is to determine if the Pico is powered by USB or if an alternative power source e.g. a battery has been connected to VSYS.WL_GPIO2 monitors the existence of VBUS, while R10 and R1 act to pull VBUS down to make sure it is 0V if VBUS is not present.
WL_GPIO1 controls the RT6154 PS (power save) pin. When PS is low (the default on Pico W) the regulator is in pulse frequency modulation (PFM) mode, which, at light loads, saves considerable power by only turning on the switching MOSFETs occasionally to keep the output capacitor topped up. Setting PS high forces the regulator into pulse width modulation (PWM) mode. PWM mode forces the SMPS to switch continuously, which reduces the output ripple considerably at light loads (which can be good for some use cases) but at the expense of much worse efficiency. Note that under heavy load the SMPS will be in PWM mode irrespective of the PS pin state.
Statistics: Posted by trejan — Wed Mar 06, 2024 1:32 pm